1. Field of the Invention
The present invention relates to a circuit arrangement and a method for generating a time-limited signal, such as for a power-on reset.
2. Description of the Related Technology
A method of this kind is known from the publication DE 100 24 980.9. After providing a supply voltage, an initialization signal (Power-on-Reset) is generated for a following circuit arrangement. A disadvantage is that the method calls for an elaborate circuit arrangement that requires a large chip surface and that the circuit arrangement continues to consume electric current after the reset signal has been generated.
In general, methods for generating a time-limited signal are used, for example, by so-called xe2x80x9cresetxe2x80x9d or xe2x80x9cinitializationxe2x80x9d signals in order to set defined electrical parameters or initial states in circuit arrangements after applying a supply voltage. Another important application of signals of limited duration is the change of states while an electrical circuit arrangement is in operation. Furthermore, it is important to develop methods for circuit arrangements that should have a low operating current or consume little current in the quiescent state in order, for instance, to keep the discharge rate of a battery low. In particular in applications in motor vehicles with the 42 volt vehicle electrical system, it is important for these arrangements to consume little current even where there are high supply voltages.
The object of the present invention is to specify a method for generating a time-limited signal that reduces the current consumption in a circuit arrangement. Another object of the invention is to specify a circuit arrangement for performing the method that can be produced by simple means and at low cost.
The above objects have been achieved according to the invention in a method of generating a time-limited signal, comprising the steps:
a) applying a supply voltage to a capacitive voltage divider including first and second divider junctions between first, second and third capacitances in series, thereby charging the voltage divider while establishing a first voltage at the first divider junction and a second voltage at the second divider junction;
b) at least partially discharging the first divider junction;
c) in response to and dependent on a varying first voltage level of the first voltage being no less than a first voltage threshold, selectively applying an additional charging current to the second divider junction in addition to the charging of the voltage divider; and
d) generating a time-limited signal in response to and dependent on at least one of:
i) the first voltage level of the first voltage, and
ii) a charging rate of a second voltage level of the second voltage.
The above objects have further been achieved according to the invention in a circuit arrangement for generating a time-limited signal at a circuit signal output thereof, the circuit arrangement comprising:
a first circuit terminal, a second circuit terminal, and the circuit signal output;
a first switching unit including a first current input, a first current output, and a first actuating terminal;
a second switching unit including a second current input, a second current output, and a second actuating terminal; and
a capacitive voltage divider including first, second and third capacitances that are connected in series with one another between the first circuit terminal and the second circuit terminal, with a first divider junction between the first and second capacitances and a second divider junction between the second and third capacitances;
wherein:
the first, second and third capacitances are each respectively a respective capacitance included in one of the switching units or a respective discrete capacitor separate from the switching units;
the first current input of the first switching unit is connected to the first divider junction;
the first current output of the first switching unit is connected to the first circuit terminal;
the first actuating terminal of the first switching unit is connected to the second actuating terminal of the second switching unit;
the second current input of the second switching unit is connected to the second circuit terminal;
the second current output of the second switching unit is connected to the second divider junction; and
the circuit signal output is connected to a switching unit signal output of one of the switching units or to the second divider junction.
Accordingly, the essence of the invention is to generate a time-limited signal in a circuit arrangement by means of a capacitive voltage divider and to reduce the flow of current in the circuit arrangement to zero after the signal has been generated. For this purpose, in order to generate a time-limited signal, at at least one signal output of a circuit arrangement, that has at least one first switching unit and one second switching unit each having an output and an input and a capacitive voltage divider with a first divider junction and a second divider junction, the circuit arrangement is put into a current-carrying state for just a limited period of time by applying the supply voltage and within this period of time a time-limited signal is fed to a signal output of the circuit arrangement. After applying the supply voltage, current flows from the first divider junction to the input of the first switching unit thereby discharging the first divider junction and during the discharging time the input of the second switching unit is activated by the output of the first switching unit and the second divider junction is charged by means of the output of the second switching unit and the time-limited signal is taken from a circuit junction within the circuit arrangement. The time-limited signal is determined here by the discharging time of the first divider junction and/or by the charging time of the second divider junction.
One advantage of the method is that the circuit arrangement consumes no further current after the time-limited signal has been generated. This allows a time-limited signal to be provided for further switching units without the initialization circuit increasing the current flow in the overall system after generation of the time-limited signal. The period over which current is input to the circuit arrangement is determined by the discharging times and the size of the capacitances of the capacitive voltage divider. Furthermore, within the period in which current is flowing in the circuit arrangement, it is possible to determine by the electrical parameters of the switching units the duration and rise behavior of the output signal. In addition, the duration of the output signal depends on the point at which the time-limited signal is output. Studies made by the applicant have shown that the method can be applied over a wide range of supply voltages, for instance between 3 and 60 volts, the maximum voltage depending on the electric strength of the components used in the circuit arrangement. Also, by disconnecting and reconnecting the circuit arrangement to the supply voltage, it is possible to generate several time-limited signals in succession. Moreover, by means of the voltage thresholds in the respective switching units, the time-limited signal can be generated reliably even at low supply voltages of, for example, 5 volts and lower and also when the supply voltage builds up slowly.
In a further development of the method, the second switching unit is activated by means of current from the first switching unit. This current is limited by a negative-feedback element in order to suppress overshoot and too rapid charging of the second divider junction. The limitation of the output current of the first switching unit can be performed either with a current source circuit or with a passive component such as a resistor
In another development of the method, the voltage at the second divider junction that is pulled toward the supply voltage level by the charging current of the second circuit arrangement is limited to a preset potential by means of a voltage-limiting element. With high supply voltages in particular, for instance voltages above 60 volts, capacitors with a much lower electric strength (i.e. dielectric strength) can be used between the first divider junction and the second divider junction. In this case, it is advantageous to limit the voltage by means of a diode structure, preferably by means of a Zener diode.
In a further development of the method, current is caused to flow through a first current-controlled switch within the first switching unit by means of the first divider junction, and current is caused to flow to the second divider junction by means of a second current-controlled switch within the second switching unit. In this case, it is advantageous to limit the output current of the second switch by a resistor. Studies carried out by the applicant have shown that it is advantageous to feed out the time-limited signal by means of an additional driver transistor in order to avoid influencing the charging or discharging process between the two divider junctions. The driver transistor generates, for example, a time-limited current which can be transformed into a voltage signal by means of a resistor.
In another further development of the method, current is caused to flow from the first divider junction through a first current mirror within the first switching unit, and current is caused to flow to the second divider junction by means of a second current mirror within the second switching unit. An advantage of the current mirror circuit is that, as opposed to the current-controlled switches, it has no passive components and it can be produced in a small size and at low cost, particularly for small capacitances of the voltage divider. Furthermore, studies carried out by the applicant have shown that it is advantageous for one of the mirror circuits to be extended by means of an additional transistor to form a current bank in order to feed out the time-limited signal. In particular when using MOS transistors here, the current in the current mirrors is influenced only slightly. Furthermore, in a development of the method, the current mirror circuit in one switching unit can be combined with the current-controlled switch circuit in the other switching unit.
Other studies carried out by the applicant have shown that it is of advantage when the capacitor between the reference potential and the first divider junction and the capacitor between the supply voltage and the second divider junction are formed by the parasitic capacitances at the input and the output respectively of the switching units. Since only the capacitor between the first divider junction and the second divider junction is embodied in the form of a discrete passive component, the circuit arrangement can be produced with a small surface area and at low cost.
In a further development of the invention, the time-limited signal is fed out preferably at the second divider junction by means of a capacitive element, such as a capacitor for example. In this case, the current consumption of the circuit arrangement can be reduced and the additional driver transistor for driving the output is omitted.